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R-Amtech International, Inc.
2101 112th Avenue NE
Suite 210
Bellevue, Washington 98004


 
 
HiPEPTM High Performance Planar Chip-Scale Packaging

R-Amtech's High Performance Planar packaging technology, known as HiPEPTM, is a next generation chip-scale packaging technology. With both single-sided and double-sided variations, HiPEP utilizes thin-film deposition to eliminate the need for wire bonds and enables die connections to be placed anywhere on the surface of the chip. The resulting technology produces reliable chip-scale packages that are high speed, high performance, high pin count, and minimum thickness.

HiPEP is a solution to contemporary packaging issues including the electrical and mechanical limitations encountered with increasing speeds and pin counts, inductance and capacitance limitations associated with wire bonds on high pin count devices, and the large die size resulting from the periphery needed to accommodate the wire-bonds with very high pin counts.

Since HiPEP allows die to be designed with connections anywhere on the surface of the chip, the die size can be significantly smaller than the same die designed with peripheral wire bonds. As with any other die shrinkage, this results in a significant cost reduction for companies that adopt HiPEP technology.

HiPEP completely eliminates the use of wire bonds within the package and this provides significant advantages in terms of package size and high-speed performance. The replacement of wire bonds with thin-film interconnects is also advantageous in terms of long-term reliability of the package. Interconnections can be adjusted to provide controlled impedance connections that are not possible with wire bonds. If thermal dissipation is an issue, the back of the die can be butted against a heat sink to provide very low thermal resistance from the die junctions to package.

HiPEP Diagram


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